Easing the energy costs of bit erasure

June 4, 2026
College of Chemistry Press Release

This work models the thermodynamic costs of memory storage in realistic circuits, offering an optimization scheme to enable energy-efficient computation.

Researchers at the University of California, Berkeley have taken a closer look at one of the smallest — but most fundamental — operations in computing: erasing a bit of information. Their new study shows that the energy cost of deleting data depends strongly on the physical design of the memory device and how quickly it operates.

The work, published in Physical Review X Energy, led by graduate researcher Songela Chen and Professor David Limmer, focuses on two common types of computer memory used in modern electronics, dynamic random access memory (DRAM) and static random access memory (SRAM). While both store digital information, the team found that they behave very differently when researchers try to minimize wasted energy during computation.

The study addresses a growing technological challenge. As artificial intelligence, cloud computing, and data centers continue to expand, global electricity consumption from information processing is rising rapidly. At the same time, computer components are shrinking toward the nanoscale, where thermal fluctuations and random noise begin to play an important role in device behavior.

Using detailed stochastic models of semiconductor circuits, the researchers studied how electrons move through memory devices during bit erasure. They then applied machine-learning-based optimization techniques to discover the most energy-efficient control protocols.

A visual diagram comparing DRAM and SRAM thermodynamic tradeoffs.

Figure 1 Bit erasure results in distinct thermodynamic tradeoffs for common memory storage devices DRAM and SRAM.

Their results revealed a surprising contrast between the two memory technologies. For DRAM, the most efficient strategy is to erase information very slowly and gently, approaching a quasistatic limit where energy dissipation is minimized. But for SRAM, waiting too long actually wastes energy because the circuit continuously consumes power simply to maintain its stored state. In that case, the team found an optimal finite operating time that balances speed, reliability, and energy consumption.

Beyond improving memory technology, the work provides a broader framework for studying the thermodynamics of computation in realistic electronic devices operating far from equilibrium. The authors hope these insights could eventually guide the design of lower-power computing hardware and help reduce the growing energy demands of modern information technology.

Chen, Songela W., and David T. Limmer. "Optimal control of bit erasure in stochastic random access memory." PRX Energy, in press (2026).